Transmitter for a controlled-shape switched signal on a communication line

ABSTRACT

The transmitter comprises a signal generator including a capacitor producing the switched signal to be applied to the line. The capacitor is charged by a charging current in response to an input signal so as to define an edge of the switched signal through a feedback loop responsive to the capacitor voltage generating a feedback current having a continuous magnitude that is a progressive function of the capacitor voltage, the charging current being a function of the feedback current. The feedback loop generates first and second feedback voltages one of which is a rising function of the capacitor voltage and the other is a falling function of the capacitor voltage. The feedback current is generated first as a function of one of the feedback voltages and subsequently as a function of the other of the feedback voltages.

FIELD OF THE INVENTION

This invention relates to a transmitter for a controlled-shape switchedsignal on a communication line.

BACKGROUND OF THE INVENTION

Local networks often make use of a communication line, such as acommunication bus, over which a set of nodes communicates. A drivermodule in a master node applies power to the line, the driver modulebeing switched to produce step changes in the power in the line totransmit signals to receivers in remote slave nodes over the line. Theswitched power signal activates the multiplexed remote nodes connectedto the line and the line also selectively transmits signals from theremote nodes back to a central processing unit.

Such a bus is used in automotive vehicles, for example, the buscomprising either a single line or a twisted pair of conductors in whichthe current flows, the close coupling between the pair of conductorsreducing their sensitivity to electromagnetic interference (‘EMI’), thatis to say reception of noise induced in the wires of the bus, andimproving their electromagnetic compatibility (‘EMC’), that is to saythe radiation of parasitic fields by the currents flowing in the wiresof the bus; both are critical parameters, especially in automotiveapplications.

Historically, in automotive applications, functions such as door locks,seat positions, electric mirrors, and window operations have beencontrolled directly by electrical direct current delivered by wires andswitches. Such functions may today be controlled by ECUs (ElectronicControl Units) together with sensors and actuators in a multiplexedController Area Network (CAN). The Controller Area Network (CAN)standard (ISO 11898) allows data to be transmitted by switching avoltage, at a frequency of 250 kbauds to 1 Mbaud for example, to themultiplexed receiver modules over the twisted pair cable. The receivermodules may be actuators that perform a function, for example bygenerating mechanical power required, or sensors that respond toactivation by making measurements and transmitting the results back tothe ECU over the bus.

The CAN bus was designed to be used as a vehicle serial data bus, andsatisfies the demands of real-time processing, reliable operation in avehicle's EMI environment, is cost-effective, and provides a reasonabledata bandwidth. However, connecting with the main body network directlyvia a CAN bus system can be expensive because of increased costs pernode and because high overall network traffic can make managementextremely difficult. To help reduce costs, the logical extension is tostructure the network hierarchically.

A variant on the CAN standard is the LIN (Local Interconnect Network)sub-bus standard (see ISO 7498), which is an extension to the CAN bus,at lower speed and on a single wire bus, to provide connection to localnetwork clusters. A LIN sub-bus system uses a single-wire implementation(enhanced ISO9141), which can significantly reduce manufacturing andcomponent costs. Component costs are further reduced byself-synchronization, without crystal or ceramics resonator, in theslave node. The system is based on common Universal asynchronousreceiver and transmitter serial communications interface (UART/SCI)hardware that is shared by most micro-controllers, for a more flexible,lower-cost silicon implementation.

It is often necessary to control accurately the shape of the leadingand/or trailing edges of switched signals transmitted over thecommunication line. This is particularly the case where it is desired tominimise electromagnetic interference, by limiting the basic frequenciesof electromagnetic emissions to certain acceptable frequency ranges andrestricting the amplitudes of emissions of harmonics of the basicfrequencies outside the acceptable range.

It is possible to generate signals to be transmitted with controlledshape by generating a step function current charging a capacitor toapproximate the desired shape of the voltage signal, as shown in FIG. 1.Such a generator is readily accommodated in an integrated circuit usingdigital techniques. However, the discontinuous changes in the chargingcurrent produce large rates of change of the voltage across thecapacitor and applied to the communication line, which are a source ofEMI harmonics. Also, the capacitor stage has high impedance, withcorrespondingly low current produced by this stage, so that severalfollower stages are needed and its components are subjected to the fullvoltage swings across the capacitor, so that they need to withstand suchrelatively high voltages.

It is possible to generate signals to be transmitted with controlledshape by analogue circuits, such as those described in U.S. Pat. Nos.5,530,388, 6,072,340 and 6,259,303, for example. However, the circuitsdescribed in these specifications do not give an optimal compromisebetween the requirements of low EMI and low circuit complexity,especially in the context of an integrated circuit implementation.

SUMMARY OF THE INVENTION

The present invention provides a transmitter for a controlled-shapeswitched signal on a communication line as described in the accompanyingclaims.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block schematic diagram of a known signal generator in atransmitter for a communication bus line,

FIG. 2 is a block schematic diagram of a signal generator in atransmitter for a communication bus line, in accordance with oneembodiment of the present invention, given by way of example,

FIG. 3 is a more detailed schematic diagram of the signal generator ofFIG. 2,

FIG. 4 is a diagram illustrating the variation with time of an outputvoltage of the signal generator of FIGS. 2 and 3,

FIG. 5 is a diagram illustrating the variation of a feedback currentappearing in operation of the signal generator of FIGS. 2 and 3, as afunction of a feedback voltage,

FIG. 6 is a diagram illustrating the variations with time of a chargingcurrent and the output voltage of the signal generator of FIGS. 2 and 3,

FIG. 7 is a schematic diagram of another embodiment of a signalgenerator in a transmitter for a communication bus line in accordancewith the present invention, and

FIG. 8 is a diagram similar to FIG. 5 for the signal generator of FIG.7.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 shows a known communication system, comprising a LINcommunication bus line 1, a power supply line 2, and a ground line 3enabling communication between a transmitter node 4 and a receiver node5. The receiver node 5 is shown schematically as comprising a diode 6connected to the positive supply line 2, a resistor 7 connected inseries with the negative pole of the diode 6, and a capacitor 8connected between the other pole of the resistor 7 and the ground line3, the LIN bus being a single conductor connected to the junctionbetween the resistor 7 and the capacitor 8. It will be appreciated thatthe receiver node 5 is in practice associated with elements (not shown)such as signal processors and actuators for exploiting the receivedsignals. The communication system comprising the lines 1, 2 and 3 andthe transmitter node 4 and receiver node 5 may be installed in a vehicleor may be included in industrial applications, for example. It will alsobe appreciated that the system may be adapted to other communicationstandards, such as the CAN standard. According to the LIN standard, asshown, the physical LIN bus medium is a single wire connected via thetermination resistor (pull-up) 7 to a positive voltage level, which, inautomotive applications, will typically be the positive battery node.The idle state (communication pulse de-asserted) is high or recessiveand the active state (communication pulse asserted) is low or dominant.

The transmitter node comprises an output stage 9 comprising a diode 10whose positive pole is connected to the positive voltage supply line 2and whose negative pole is connected to one terminal of a resistor 11,the emitter and collector terminals of a PNP transistor 12 beingconnected in series between the other terminal of the resistor 11 andthe ground line 3.

The signal generator also comprises an input stage 13. A rectangularpulse data signal is applied to an input terminal 14, which is connectedto control the opening and closing of a switch 15 connected to theground line 3. A first current source 16 is connected in series with asecond current source 17 through the switch 15 to ground. The connection18 between the current sources 16 and 17 is connected to one pole of acapacitor 19 whose other pole is connected to the ground line 3. Acurrent shape generator 20 receives a triggering input from the datasignal input terminal 14, and controls the currents passed by thecurrent sources 16 and 17, so that the currents change step-wise asindicated schematically. The current passed by the source 17 when theswitch 15 is closed is 2.I_(SH), where I_(SH) is the current passed bythe current source 16.

In operation, the capacitor is charged to the voltage of the supply line2 while the input signal at the terminal 14 is de-asserted. When theinput signal at the terminal 14 is asserted, the switch 15 is closed andthe net current I_(SH) supplied by the current sources 16 and 17increases step-wise to discharge the capacitor 19, the voltage-acrossthe capacitor 19 decreasing as a function of the integral of the currentI_(SH). At the falling edge of the input pulse, the switch 15 is opened,and the net current flowing to the capacitor 19, from the current source16 alone, is inverted and increases step-wise until the capacitor isfully charged.

In practice, the order of magnitude of the current I_(SH) is low,typically 10 micro amps maximum, for example, and due to this highimpedance of the input stage, several follower stages 21 are required.The follower stages 21 apply a current proportional to the voltageacross the capacitor 19 to the base of the transistor 12, so as to applythe output signal to the LIN bus 1.

The use of the digital current shape generator 20 enables differentshapes of the rising and falling edges of the signal applied to the LINbus 1 to be synthesised. The signal generator therefore enables thecorners of the rectangular input pulse to be rounded. However, thestep-wise nature of the charging current of the capacitor 19 introduceshigh rates of change of the charging current with time and introducesharmonics of the base frequency of the pulse edge on the LIN bus 1.Also, the current shape generator 20 is a relatively complex circuit,typically including several voltage comparators. Moreover, the currentsources 16 and 17 are exposed to the full range of voltages across thecapacitor 19, increasing the semiconductor area of the elements requiredto withstand the high voltages.

FIG. 2 shows a signal generator in a transmitter in accordance with oneembodiment of the present invention. The receiver node is again shown at5 and the transmitter node at 4, with an output stage 9. A singlefollower stage 21 supplies the base of the transistor 12 of the outputstage 9 with a current that is proportional to the voltage across thecapacitor 19.

The voltage across the capacitor 19 is also supplied to a voltagegenerator 22 in a feedback loop. The voltage generator 22 produces afirst voltage V_(L) that is equal to the voltage V_(o) across thecapacitor 19 up to a clamp value, of 5 volts in this example, and asecond voltage V_(H) that is equal to the supply voltage V_(SUP) minusthe voltage V_(o) across the capacitor 19, the voltage V_(H) being alsolimited to the same clamp value. A selection circuit 23 produces afeedback voltage V_(E) by selecting the lower of the two values V_(L) orV_(H). The feedback voltage V_(E) is applied across a resistor R in afeedback current generator so as to produce a feedback current I_(E)which is equal to V_(E)/R, the feedback current I_(E) being limited to aclamp value I_(MAX). The feedback current I_(E) is applied to a chargingcurrent generator 25 that selectively inverts the feedback current I_(E)to produce a charging current I_(C) that is applied to the capacitor 19.The input signal is applied to trigger the voltage generator 22 andpilot the charging current generator 25.

The voltage generator 22, selection circuit 23, feedback currentgenerator 24 and charging current generator 25 constitute a feedbackloop. In operation, at the rising edge of the rectangular data pulseapplied to the input terminal 14, the voltage across the capacitor 19,initially at the supply voltage V_(SUP) is applied to the voltagegenerator 22. The voltage V_(H) is initially smaller than the voltageV_(L) and is selected by the selection circuit 23. The feedback voltageV_(E) applied to the resistor R in the feedback current generator 24produces a feedback current I_(E) that is applied by the chargingcurrent generator 25 to the capacitor 19 in a direction so as to reducethe charge of the capacitor and hence its voltage V_(O). Accordingly,the voltages V_(H) and V_(E) increase exponentially until the dampvoltage of the generator 22 is reached. The feedback V_(E) and thefeedback current I_(E) are then maintained at constant values, so thatthe voltage V_(O) continues decreasing but linearly with time. When thevoltage V_(L) becomes smaller than the voltage V_(H), the selectioncircuit 23 selects the voltage V_(L). The voltage V_(E) then decreasesexponentially with time, so that the feedback current I_(E) alsodecreases exponentially with time, and the voltage V_(O) across thecapacitor 19 changes progressively more and more slowly.

This half cycle is then repeated at the falling edge of the input pulse,with the charging current I_(C) inverted by the inverter 25, so that thevoltage V_(O) across the capacitor 19 progressively approaches thevoltage V_(SUP).

A preferred embodiment of the signal generator shown in FIG. 2 isillustrated in FIG. 3. The voltage generator 22 comprises a firstvoltage generator element 26, whose input is connected to receive theV_(O) voltage across the capacitor 19 and a second voltage generatorelement 27 having an inverted input connected to receive the voltageV_(O) and a direct input connected to receive the supply voltageV_(SUP). The output of the first generator element 26 produces thefeedback voltage V_(L) and the output of the second generator element 27produces the feedback voltage V_(H).

The selection circuit 23 comprises a pair of diodes 28 and 29 connectedrespectively to receive the voltages V_(L) and V_(H) on their negativepoles, the positive poles being connected to the base of a transistor30. The collector of the transistor 30 is connected to an internal powersupply line 31 at a substantially lower voltage than the LIN bus powersupply line 2. A current generator 39 is connected between the supplyline 31 and the base of the transistor 30. The emitter of the transistor30 is connected to one terminal of the resistor R of the feedbackcurrent generator 24.

The feedback current generator 24 also comprises a first field effecttransistor (‘FET’) 32 whose drain is connected to the other terminal ofthe Resistor, and whose source is connected to the ground line 3. Thegate of the FET 32 is connected to the gate of a further FET 32, whosesource is also connected to the ground line 3 and whose drain is shortedto its gate and is also connected through a current generator 34 to thevoltage supply line 31.

The charging current generator and inverter 25 comprises first andsecond current mirrors 35 and 36 that are driven by the current I_(E) inthe transistor 30 and the resistor R as indicated by the arrows 37 and38, the current flowing in the mirror 35 being equal to I_(E) and thecurrent generated in the mirror 36 being 2.I_(E). The current mirror 35is connected to the capacitor 19 directly and the mirror 36 is connectedto the capacitor 19 through the switch 15.

In operation, the diodes 28 and 29 select the lower of the voltagesV_(L) and V_(H) at the outputs of the voltage generator elements 26 and27. As long as the selected voltage is positive, it is applied acrossthe resistor R and the FET 32, the FET 33 and current generator 34serving to clamp the feedback current I_(E) at a maximum value I_(MAX).The operation of the switch 15 serves to select the inversion or not ofthe charging current I_(C) applied to the capacitor 19. A startingcurrent for the transistor 30 is provided by the current generator 39connected between the voltage supply line 31 and the base of thetransistor 30.

Referring now to FIGS. 4 and 5, it will be seen that, during a firstphase 40, starting at the rising edge of the data signal at the terminal14, the voltage V_(O) decreases as an exponential function of time, itsrate of decrease progressively increasing. During a second phase 41, thevoltage V_(O) decreases linearly with time, and during a third phase 42,the voltage V_(O) continues to decrease as an exponential function oftime, but with its rate of change progressively decreasing. The voltageV_(O) subsequently remains constant during a fourth phase 43. It will beappreciated that, throughout the three phases 40 to 42, the feedbackcurrent I_(E) and the charging current I_(C) have continuous magnitudesthat are progressive functions of the V_(O), so that the rate of changeof the V_(O) never exceeds maximum values as would be the case withstep-wise, discontinuous changes in the charging current. Subsequentphases 44, 45 and 46 mirror the phases 42, 41 and 40 with the currentinverted so that the capacitor is progressively charged up to theV_(SUP) in response to the falling edge of the data signal at theterminal 14.

The charging current is proportional to the feedback voltage V_(E) fromthe selection circuit 23 divided by the value of the resistor R untilthe current reaches the maximum value I_(MAX) defined by the generator34 and FET 33. FIG. 6 shows the resulting values of the charging currentI_(C) and the output V_(O) as functions of time. This half cycle ofvariation of the output voltage corresponds with a close approximationto a pure sinusoidal half cycle, so that electromagnetic emissions onthe LIN bus 1 are limited to a single base frequency with littlecontribution from harmonics of that base frequency. The base frequencyis a relatively low frequency, which can readily be chosen to becompatible with acceptable standards.

FIG. 7 shows a variant of the embodiment of the invention shown in FIG.3 in which the resistor R is replaced by resistors R₁ and R₂ in paralleland the FET 32 is replaced by FETS 46 and 47 in series respectively withthe resistors R₁ and R₂, The values of the resistors R₁ and R₂ arechosen so that the application of a voltage V_(E) to the resistors R₁and R₂ with the FETS 46 and 47 conducting will divide the feedbackcurrent I_(E) so that a part I_(R) of the feedback current I_(E) flowsthrough the resistor R₁ and a part equal to three times I_(R) flowsthrough the resistor R₂. The variation of the overall feedback currentI_(E) with the voltage V_(E) is shown in FIG. 8, which is similar to thediagram of FIG. 5. The sum of the part currents in the R₁ and R₂ isequal to four times I_(R) until the gate-source voltage of the FET 47reaches that of the FET 33 and the feedback current I_(E) then reducesto the part current I_(R) until the part current I_(R) reaches the valueI_(MAX). The resulting feedback current I_(E) remains a continuousfunction of the feedback V_(E) but its rate of change is initiallyfaster than in the embodiment of FIGS. 2 and 3 and subsequently slower.It is found that this variant gives an even closer approximation to asinusoidal half cycle of the rising and falling edges of the V_(O) withconsequently even less emissions of harmonics of the base frequency.

1. A transmitter for a controlled-shape switched signal on acommunication line comprising signal generator means including capacitormeans and signal producing means responsive to a capacitor voltageacross said capacitor means for applying said switched signal to saidline, and charging means responsive to an input signal for supplying acharging current to said capacitor means so as to define an edge of saidswitched signal, characterized in that said charging means comprisesfeedback loop means responsive to said capacitor voltage for generatinga feedback current having a continuous magnitude that is a progressivefunction of said capacitor voltage, said charging current being afunction of said feedback current so that the rate of change of saidcapacitor voltage is a continuous function of time, said feedback loopmeans comprises first and second feedback loop elements for generatingfirst and second feedback voltages whose magnitudes are respectivefunctions of said capacitor voltage and selection means for generatingsaid feedback current first as a function of a selected one of saidfirst and second feedback voltages and subsequently as a function of theother of said feedback voltages.
 2. A transmitter as claimed in claim 1,wherein one of said first and second feedback voltages is a risingfunction of said capacitor voltage and the other is a falling functionof said capacitor voltage, so that the rate of change of said feedbackcurrent increases with time while said one of said first and secondfeedback voltages is selected and decreases with time while said otherof said first and second feedback voltages is selected.
 3. A transmitteras claimed in claim 1, wherein said feedback loop means comprises clampmeans for maintaining said feedback current at a limit value such thatsaid charging current and said capacitor voltage vary substantially aslinear functions of time for a part of said edge of said switchedsignal.
 4. A transmitter as claimed in claim 1, wherein said selectionmeans is responsive to the relative magnitudes of said first and secondfeedback voltages to select one of said first and second feedbackvoltages.
 5. A transmitter as claimed in claim 1, wherein said rate ofchange of said feedback current is arranged to be a function of saidcapacitor voltage such that said capacitor voltage varies substantiallyas an exponential function of time, at least for a part of said edge ofsaid switched signal.
 6. A transmitter as claimed in claim 1, whereinsaid charging means comprises resistive means for receiving a voltagethat is a function of said capacitor voltage for generating saidfeedback current.
 7. A transmitter as claimed in claim 6, wherein saidcharging means comprises means for modifying said resistive means so asto modify the rates of change of said feedback current and said chargingcurrent.
 8. A transmitter as claimed in claim 6, wherein said capacitorvoltage varies substantially as a sinusoidal half-cycle having a singlefrequency to define said edge of said switched signal.
 9. A transmitteras claimed in claim 1, wherein said capacitor voltage variessubstantially as a sinusoidal half-cycle having a single frequency todefine said edge of said switched signal.
 10. A transmitter as claimedin claim 1, wherein said charging means is selectively responsive tosaid input signal for supplying a positive or a negative chargingcurrent to said capacitor means, whereby to generate a rising edge or afalling edge of said switched signal.
 11. A transmitter as claimed inclaim 1, wherein said charging means comprises resistive means forreceiving a voltage that is a function of said capacitor voltage forgenerating said feedback current.
 12. A transmitter as claimed in claim1, wherein said capacitor voltage varies substantially as a sinusoidalhalf-cycle having a single frequency to define said edge of saidswitched signal.